Qualcomm Sets Up Smartphones for Agentic AI with Snapdragon 8 Elite: Summary Qualcomm unveiled the Snapdragon 8 Elite at its Snapdragon Summit, featuring second-gen Oryon CPUs wit ...

The National Institute of Standards and Technology will fund ASU and Deca Technologies up to $100M for SHIELD USA, advancing U.S. microchip packaging. This initiative boosts innovation, reshoring ...

SK hynix has commenced mass production of the world’s first 321-layer triple-level cell NAND flash memory chips. Building on its 238-layer success, the company aims to lead AI storage markets, ...

Samsung Electronics introduces 2nd-generation AI model, Gauss 2: Summary Samsung unveiled its Gauss2 AI model at the Samsung Developer Conference Korea 2024, showcasing enhanced p ...

European chipmaker STMicroelectronics (STM) will partner with China’s Hua Hong Semiconductor to produce 40-nanometre microcontrollers for China’s auto and industrial markets starting in 2024. This ...

Summary Chip design has evolved drastically since 1971, yet modern tools often fail to tackle its staggering complexity. Intel's team devel ...

Nvidia says it will sell more of its next-generation Blackwell chips than previously anticipated: Summary Nvidia’s new Blackwell AI chips are in high demand, with 13,000 units s ...

China races to stockpile US chips before Trump ramps up sanctions: Summary China is ramping up US microchip imports, stockpiling $1.11 billion in October, a 60% year-over-year sur ...

Summary The EDA industry remains highly competitive, with major players like Cadence and Synopsys dominating 90% of the market through internal innovation and AI/ML integration. Despite fewer startups ...

High-bandwidth memory (HBM) sales are surging as AI accelerators and HPC applications demand faster data processing. Innovations like custom HBM and advancements in packaging, 3D stacking, and ...

Summary Device design starts by defining its workload and available resources. Early decisions shape physical architecture, with tools like Synopsys’s Platform Architect aiding integration planning.

Summary Fan-Out Panel-Level Packaging (FOPLP) is emerging as a scalable, cost-effective solution for advanced nodes, balancing high integration densities with manufacturability. Despite challenges ...